How does double buffering work in DMA, and how is it different from circular mode with HT/TC?

True double buffering (available on DMA2 streams on STM32F4/F7/H7) uses two completely separate memory buffers with automatic hardware pointer switching. The DMA controller maintains two memory address registers — M0AR and M1AR — each pointing to a different buffer. When the current buffer is full, the hardware atomically switches to the other buffer and sets the Current Target (CT) flag to indicate which buffer is now active. A Transfer-Complete interrupt notifies the CPU, which processes the just-completed buffer while DMA fills the other.

The key advantage over circular HT/TC is physical buffer independence: the two buffers can be at arbitrary, non-contiguous memory addresses. This is useful when you cannot allocate a single large contiguous block (fragmented memory), when buffers need to be in different memory regions (one in SRAM, one in DTCM), or when you want to redirect DMA output dynamically. While DMA fills buffer A, the CPU can even update the M1AR register to point to a completely different location for the next transfer — enabling scatter-gather-like patterns where successive DMA transfers land in different memory regions.

In contrast, circular HT/TC uses a single contiguous buffer split into logical halves — simpler to set up and available on all DMA channels (not just specific streams). The switching is implicit (based on counter position) rather than explicit (hardware pointer swap). In practice, circular HT/TC is more commonly used because it covers the majority of use cases, requires less configuration, and works on all STM32 DMA channels. True double buffering is reserved for advanced scenarios: high-bandwidth video/audio processing, multi-stage DMA pipelines, or when contiguous allocation is impractical.