Walk through an I2C register read transaction, explaining each phase.

Reading a register from an I2C sensor (e.g., reading the WHO_AM_I register at address 0x0F from a device at address 0x68) involves a two-phase transaction — a write phase to set the register pointer, followed by a read phase to retrieve the data:

Phase 1 — Write the register address:

1. Master asserts START (SDA high-to-low while SCL is high)
2. Master sends slave address (0x68) + Write bit (0) = 0xD0, MSB first (8 bits)
3. Slave pulls SDA low during the 9th clock pulse = ACK (slave is present and listening)
4. Master sends register address (0x0F) (8 bits)
5. Slave ACKs — it has set its internal register pointer to 0x0F

Phase 2 — Read the register value: 6. Master asserts repeated START (START without preceding STOP) 7. Master sends slave address (0x68) + Read bit (1) = 0xD1 (8 bits) 8. Slave ACKs 9. Slave drives SDA with the register data while master clocks SCL (8 bits) 10. Master sends NACK (leaves SDA high during the 9th clock) to signal "no more bytes needed" 11. Master asserts STOP (SDA low-to-high while SCL is high)

The repeated START in step 6 is critical — if the master sent a STOP after step 5 and then a new START for step 7, another master could seize the bus in between, and the register pointer might get changed by the other master's transaction. The repeated START keeps the bus locked for the entire read operation.