What does the GPIO speed (slew rate) setting control, and how do you choose it?

The GPIO speed setting (Low, Medium, High, Very High on STM32) controls the slew rate of the output driver — how fast the pin voltage transitions between logic levels. Internally, this adjusts the drive strength of the output transistors. A higher speed setting turns on the output transistors more aggressively, producing steeper voltage edges (faster rise and fall times). The speed setting does not affect the maximum toggling frequency directly, but slower edges may violate setup/hold timing at high switching rates.

Choosing the right speed is a trade-off between signal integrity and electromagnetic interference (EMI). Low speed (typically 2-8 MHz edge rate) produces gentle transitions that generate minimal high-frequency energy — ideal for LEDs, relays, chip-select lines, and any slow control signal. High or Very High speed (50-100+ MHz edge rate) is necessary for fast communication peripherals: SPI at 10+ MHz, SDIO, FSMC/FMC external memory interfaces, or high-speed timer outputs where slow edges would violate timing constraints. Using unnecessarily high speed settings on low-frequency signals creates problems: faster edges generate more EMI (radiated emissions that may fail compliance testing), cause signal ringing on unterminated PCB traces, and increase dynamic power consumption due to higher transient currents during switching.

The rule of thumb: use the lowest speed setting that meets your signal's timing requirements. For a 1 MHz SPI clock, Medium speed is sufficient. For a 42 MHz SPI clock, Very High is required. For an LED toggle, Low speed is perfectly adequate. If you see ringing or overshoot on an oscilloscope, reducing the GPIO speed setting is often a cheaper fix than adding series termination resistors. During EMC pre-compliance testing, one of the first things to try for excessive radiated emissions is reducing GPIO speed on high-frequency outputs.