What is a repeated START and why does it matter?

A repeated START (Sr) is a START condition generated by the master without first issuing a STOP to release the bus. Electrically, it looks identical to a regular START (SDA falls while SCL is high), but it occurs in the middle of a transaction rather than from an idle bus state.

Repeated START matters for two reasons. First, in multi-master systems, it prevents another master from stealing the bus between two related operations. Consider a register read: the master must write the register address, then read the data. If it releases the bus with a STOP between these two steps, another master can jump in, address the same slave, and change its register pointer — causing the original master to read the wrong register when it resumes. The repeated START keeps the bus owned by the current master throughout the compound operation.

Second, some slave devices require it for correct operation. Many I2C sensors and EEPROMs interpret a STOP as "finalize the current operation" — for example, an EEPROM might begin an internal write cycle upon receiving STOP. Sending a STOP after the address phase and before the read phase would trigger the wrong internal behavior. The repeated START avoids this by keeping the transaction logically continuous.

In practice, almost every I2C register read uses a repeated START. It is so common that many HAL libraries (STM32 HAL's HAL_I2C_Mem_Read()) implement it automatically — the programmer specifies the device address, register address, and buffer, and the driver generates the write-Sr-read sequence internally.