What is the difference between I2C and SMBus? When does SMBus matter?

SMBus (System Management Bus) is based on I2C and is wire-compatible at the electrical level, but it adds constraints and features that make it more robust and deterministic:

Timeout (35 ms): SMBus requires that any bus transaction complete within 35 ms. If a clock low period exceeds 25 ms, all devices must reset their communication state. This prevents the bus lockup problem that can occur in I2C when a slave stretches the clock indefinitely. This single feature is the most important practical difference — SMBus buses cannot get permanently stuck.

Clock speed range: I2C allows clock speeds down to DC (zero hertz — the master can pause arbitrarily). SMBus requires the clock to stay within 10-100 kHz. This means SMBus devices must respond within a bounded time, enabling deterministic communication.

Packet Error Checking (PEC): SMBus optionally supports an 8-bit CRC (using the polynomial x^8 + x^2 + x + 1) appended to each transaction. I2C has no error detection beyond ACK/NACK.

Alert Response Address (ARA): SMBus slaves can assert a shared ALERT line to signal the master that they need attention. The master then reads from the ARA address (0x0C) to discover which device raised the alert, avoiding the need to poll every device.

Address Resolution Protocol (ARP): Allows dynamic address assignment, solving the problem of address conflicts when identical devices share a bus.

SMBus matters primarily in power management (battery fuel gauges, voltage regulators, platform management in servers) and PC hardware (where SMBus is the standard for SPD EEPROM communication with DIMMs, temperature monitoring, and fan control). If your device's datasheet says "SMBus compatible," you can generally use it on an I2C bus — but an I2C-only device on an SMBus system may fail if it stretches the clock beyond 25 ms.