What is the difference between SAR and sigma-delta ADC architectures?

A SAR (Successive Approximation Register) ADC works by performing a binary search. It samples the input voltage onto a hold capacitor, then iteratively compares it against an internal DAC: set the MSB, compare, keep or clear, move to the next bit. An n-bit conversion takes n comparison cycles plus the initial sample-and-hold time. SAR ADCs offer moderate resolution (8-16 bits), fast conversion (typically 0.1-5 Msps), low power, and low latency — a single conversion produces a valid result with no pipeline delay. They are the dominant architecture in microcontrollers (STM32, NXP, TI MSP430, Microchip PIC) because of their excellent balance of speed, resolution, power, and silicon area.

A sigma-delta ADC takes a fundamentally different approach: it samples the input at a very high rate (megahertz range) using a simple 1-bit comparator, then uses a digital decimation filter to convert the dense 1-bit stream into high-resolution output (16-24 bits) at a much lower effective sample rate. The oversampling and noise-shaping feedback loop push quantization noise out of the signal band, achieving exceptional SNR. Sigma-delta ADCs excel at precision measurement — load cells, strain gauges, thermocouples, audio — where resolution and noise performance matter more than speed.

The practical trade-offs drive architecture selection: choose SAR when you need speed, low latency, or multiplexed channels (SAR settles instantly when switching channels). Choose sigma-delta when you need high resolution (more than 16 bits) and can tolerate higher latency. Sigma-delta ADCs have a critical limitation for multiplexed systems: the digital decimation filter must settle after each channel change, which takes multiple conversion periods. Switching channels rapidly on a sigma-delta ADC produces inaccurate readings because the filter output still reflects the previous channel. This settling time penalty makes sigma-delta poorly suited for rapid multi-channel scanning — a common interview pitfall where candidates suggest sigma-delta for a multi-sensor system without considering the channel-switching overhead.