What is UART idle line detection and why is it important for packet-based protocols?

An idle line condition occurs when the UART RX line remains high (idle) for one full frame duration after the last received byte. Most modern UART peripherals (STM32, NXP, TI) can generate an interrupt when this condition is detected. This is distinct from simply "not receiving data" — the hardware specifically measures the silence after the last stop bit.

Idle line detection is critical for packet-based protocols where messages have variable length and no fixed delimiter. Consider a Modbus RTU frame: it is terminated by a silence of at least 3.5 character times. Without idle detection, firmware would need to implement a software timer that resets on every received byte and fires when no byte arrives within the timeout — this is fragile, wastes a hardware timer, and has poor resolution at high baud rates.

With idle line detection, the workflow becomes clean: DMA fills a buffer with incoming bytes continuously, and the idle interrupt signals "the sender paused — the current message is complete." Firmware then processes the accumulated bytes as a complete frame. This pattern (DMA + idle line interrupt) is the standard approach for UART reception in production embedded firmware. It handles variable-length messages, minimizes CPU overhead, and is robust against timing jitter.