What limits the number of devices and maximum bus length on I2C?

The primary physical constraint is total bus capacitance. The I2C specification limits bus capacitance to 400 pF for standard mode and fast mode. Each device adds input capacitance (typically 5-15 pF per device), and each centimeter of PCB trace adds approximately 1-2 pF. Connectors, through-hole headers, and cables add more. When total capacitance approaches the limit, rise times become too slow for the target clock speed, causing data corruption.

With 7-bit addressing, the theoretical maximum is 128 addresses, but 16 are reserved (0x00-0x07 and 0x78-0x7F), leaving 112 usable addresses. In practice, bus capacitance limits the device count to 20-30 devices on a PCB before the 400 pF limit is reached, well before the address space is exhausted.

For bus length, the limitation is again capacitive. Typical wire capacitance is about 50-100 pF per meter. A 2-meter cable adds 100-200 pF, consuming most of the 400 pF budget before any device capacitance is counted. At standard mode (100 kHz), buses up to 2-3 meters are practical with 4.7 kohm pull-ups. At fast mode (400 kHz), 1 meter is a more realistic limit.

To extend beyond these limits: (1) use active pull-ups (current-source pull-ups that charge the bus faster regardless of capacitance), (2) use I2C bus buffers/extenders (like PCA9600 or LTC4311) that isolate the capacitance of different bus segments, (3) reduce the clock speed, or (4) use lower-value pull-up resistors (but not below the minimum dictated by VOL and I_sink). For truly long-distance I2C (tens of meters), differential I2C extenders exist, but at that point you should question whether I2C is the right protocol — RS-485 may be a better fit.