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GPIOInterrupts and Debouncingfoundational

When would you use GPIO polling vs. external interrupts? What are the trade-offs?

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Polling means the CPU periodically reads the pin state in a loop or timed task. It is simple to implement, deterministic in timing, and appropriate when the main loop already runs at a frequency that exceeds the event rate — for example, checking a button state every 10 ms in a super-loop. Polling also naturally supports debouncing, since the periodic sampling acts as a time filter. The downsides are wasted CPU cycles checking a pin that rarely changes, inability to wake the MCU from sleep modes, and the risk of missing very short pulses that occur between polling intervals.

External interrupts (EXTI) trigger immediately on a pin edge, so the CPU can sleep or perform useful work between events. This is essential for low-power designs where the MCU must wake from Stop or Standby mode on a pin change, and for capturing fast or infrequent signals like encoder pulses or zero-crossing detections. However, interrupts add complexity: the ISR must be kept short, shared state between ISR and main context must be managed carefully (volatile variables, critical sections), and mechanical switches generate dozens of bounce edges that can flood the interrupt system.

The best practice for mechanical inputs is a hybrid approach: configure an EXTI interrupt to detect the first edge (this allows the MCU to sleep between presses), then in the ISR, disable the EXTI interrupt and start a software timer for 20-50 ms. When the timer expires, read the pin state to get the stable value, process the event, and re-enable the EXTI interrupt. This gives you both low-power wake-up capability and clean debouncing without the complexity of handling every bounce edge.

Source: GPIO Q&A