Why are pull-up and pull-down resistors needed, and how do you choose their values?

Pull resistors ensure a GPIO input rests at a known logic level when nothing is actively driving it. Without one, a floating input picks up electromagnetic noise and oscillates unpredictably between high and low. This causes three problems: (1) the CMOS input buffer's PMOS and NMOS transistors both partially conduct when the input voltage sits near the switching threshold, creating a shoot-through current path from VDD to GND that wastes power — potentially several microamps per pin; (2) the pin reads random values, producing unpredictable software behavior; (3) if the pin is configured as an interrupt source, noise coupling generates spurious interrupts that flood the CPU.

A pull-up resistor ties the line to VDD (idle-high), used for active-low buttons and open-drain buses. A pull-down ties it to GND (idle-low), used for active-high signals. Most STM32 MCUs include internal pull resistors of approximately 30-50 kohm. These are convenient for prototyping but too weak for noisy environments or fast edges — the high resistance means slow RC time constants and poor noise rejection. External pull resistors of 1k-10k ohm are used when stronger pull strength is needed.

Choosing the value is a trade-off between noise immunity and power consumption. Lower resistance gives stronger pull strength and faster edge transitions but increases static current when the line is actively driven to the opposite state (I = V / R). For a button pulled up to 3.3V with a 4.7 kohm resistor, pressing the button sinks 0.7 mA — acceptable for battery applications. For I2C, the pull-up value must satisfy rise-time requirements: 4.7 kohm works at 100 kHz standard mode, but 400 kHz fast mode often needs 2.2 kohm because the bus capacitance and the higher clock rate demand faster edges. Always calculate t_rise = 0.7 * R * C_bus and verify it meets the spec.