Signal integrity and EMC

Quick Cap

Signal integrity (SI) and electromagnetic compatibility (EMC) determine whether a digital signal arrives at its destination clean enough to be read correctly, and whether the system can pass regulatory emissions testing. As clock rates increase, what was once "just a wire" becomes a transmission line with reflections, ringing, and crosstalk. Interviewers ask about SI/EMC to see whether a firmware engineer understands the physical layer consequences of running SPI at 50 MHz or choosing a long ribbon cable for an SDRAM interface.

Key Facts:

• Rise time, not frequency, drives SI -- a 1 MHz square wave with a 2 ns rise time has energy content in the hundreds of MHz
• Reflections occur wherever impedance changes (connector, via, stub, unterminated end) and cause ringing, overshoot, and data errors
• The critical-length rule -- if the round-trip propagation delay on a trace exceeds roughly one-half the signal's rise time, reflections matter and termination may be needed
• EMC has two sides -- emissions (your board radiates or conducts noise that interferes with other equipment) and susceptibility (external noise disrupts your board)
• Ground planes are the single most effective SI and EMC technique -- they provide a low-inductance return path and reduce loop area
• Common-mode noise is harder to filter than differential-mode noise and is the primary cause of radiated emissions

Deep Dive

At a Glance

When Does SI Matter for Firmware Engineers?

Not every signal needs SI analysis. A 100 kHz I2C bus on a 3 cm trace is electrically short and needs no special treatment. But as speeds increase, traces become transmission lines:

Rule of thumb for critical length: if the one-way trace delay exceeds roughly rise_time / 6, reflections can corrupt the signal. For FR4 PCB material, the propagation delay is approximately 6 ns per meter (or about 150 ps per cm). A 2 ns rise time becomes critical at about 2 / 6 / 0.15 ns/cm = approximately 2.2 cm. Any trace longer than that needs controlled impedance and possibly termination.

Reflections and Ringing

When a signal edge reaches a point where the impedance changes, part of the energy reflects back toward the source. The reflection coefficient is:

rho = (Z_load - Z_line) / (Z_load + Z_line)

Example: 50 Ohm trace into an open circuit (Z_load = infinity):
  rho = (inf - 50) / (inf + 50) = +1.0   (full positive reflection)

Example: 50 Ohm trace into a short circuit (Z_load = 0):
  rho = (0 - 50) / (0 + 50) = -1.0       (full negative reflection)

Example: 50 Ohm trace into a matched 50 Ohm load:
  rho = (50 - 50) / (50 + 50) = 0         (no reflection -- ideal)

Ringing is what you see on an oscilloscope when reflections bounce back and forth multiple times before damping out. Each bounce has reduced amplitude, but if the ringing exceeds the input's noise margin, the receiver can misinterpret a HIGH as LOW or vice versa, causing bit errors.

Termination strategies:

• Series termination -- a resistor at the source (value = Z0 - Z_source). Cheap, one resistor per signal, absorbs the reflected wave at the source end. Best for point-to-point connections.
• Parallel termination -- a resistor at the load (value = Z0). Absorbs the incident wave at the load end so no reflection is created. Draws DC current, so it is less power-efficient.
• AC termination -- a resistor plus capacitor in series at the load. Blocks DC current while still terminating AC signals. Saves power but adds a component.

EMC Fundamentals

EMC testing ensures that a product does not interfere with other equipment (emissions) and is not disrupted by external electromagnetic energy (susceptibility/immunity).

Key regulatory standards:

• FCC Part 15 (US) and CISPR 32 (international) for emissions
• IEC 61000-4-x series for immunity (ESD, surge, radiated immunity, etc.)
• CISPR 25 for automotive EMC
• IEC 60601-1-2 for medical device EMC

Grounding Strategies

Ground is not a magical zero-volt reference -- it is a conductor with finite resistance and inductance. Current flows in loops, and the loop area determines how much magnetic flux the loop captures (susceptibility) and how much it radiates (emissions).

Bad: signal return path forced to take long detour

   MCU ----[long trace]---- Sensor
   GND --[gap in plane]------ GND
           ^^^^^^^^^^^
       Large loop area = antenna

 Good: unbroken ground plane directly under signal trace

   MCU ----[signal trace]---- Sensor
   GND ====[solid plane]====== GND
       Minimal loop area = low noise

Grounding rules for firmware engineers reviewing a PCB:

• Ensure no signal trace crosses a split or gap in the ground plane -- the return current must detour around the gap, creating a large radiating loop
• Keep analog and digital grounds connected at a single point (star ground) or use a solid shared ground plane with careful component placement
• Ground stitching vias (regularly spaced vias connecting ground planes on different layers) reduce cavity resonance and provide short return paths for signals changing layers

Common-Mode vs Differential-Mode Noise

• Differential-mode noise flows in opposite directions on a signal-return pair. It is the "wanted" signal and also the easier noise to filter (standard LC filters work well).
• Common-mode noise flows in the same direction on both conductors and returns through parasitic paths (chassis, earth, stray capacitance). It is the dominant source of radiated emissions and the hardest to filter. Common-mode chokes (a ferrite bead or transformer with both conductors wound in the same direction) are the primary defense.

Firmware engineers encounter common-mode problems when a cable acts as an antenna. For example, a USB cable radiating the MCU's clock harmonics is almost always a common-mode problem -- the noise rides on both USB data lines together and radiates from the cable shield.

PCB Layout Awareness for Firmware Engineers

Firmware engineers rarely route PCBs, but they do review schematics and layouts during bring-up and should flag obvious problems:

• Clock traces routed next to sensitive analog inputs -- crosstalk will degrade ADC accuracy
• Long parallel traces for high-speed signals -- maximizes crosstalk; ask the EE to increase spacing or add ground guard traces
• Switching regulator placed far from its output capacitors -- increases loop area and radiated noise
• Signal traces crossing ground plane splits -- causes return current detour and increases emissions
• Connectors with signal pins adjacent to ground pins -- good practice; connectors without adjacent grounds radiate more

Debugging Story: EMC Test Failure from Long GPIO Wire

A team submitted an industrial control board for EMC testing. The board failed radiated emissions at 48 MHz and its harmonics (96 MHz, 144 MHz). The 48 MHz signature matched the MCU's system clock frequency. After reviewing the layout, the EE found no issues on the PCB itself. The problem was a 30 cm unshielded wire connected to a GPIO pin (active-LOW sensor input with a 10 kOhm pull-up). The long wire acted as a quarter-wave antenna at approximately 250 MHz (close enough to the 5th harmonic of 48 MHz). Even though the GPIO was configured as an input, the MCU's internal clock noise coupled onto the pin through parasitic capacitance and radiated from the wire.

The fix had two parts: (1) add a 1 kOhm series resistor and 100 pF cap at the GPIO pin to form an RC low-pass filter that attenuated frequencies above 1.6 MHz, and (2) reduce the pull-up to 4.7 kOhm and route the wire through a shielded cable with the shield grounded at the board end. The board passed emissions on the next test.

Lesson: any wire leaving a board is a potential antenna. Firmware engineers should flag unfiltered GPIO connections to external cables during design review, even for simple input-only signals.

What interviewers want to hear: that you understand the physical-layer implications of high-speed digital signals, know that reflections come from impedance mismatches, can explain why ground planes matter for both SI and EMC, and recognize that cables and wires leaving the board are the most common EMC failure path. They also want to see that you know this affects firmware decisions -- choosing a lower SPI clock rate, adding filtering to external GPIO lines, or requesting controlled-impedance routing for an SDRAM interface.

Interview Focus

Classic Interview Questions

Q1: "What causes ringing on a digital signal and how do you fix it?"

Model Answer Starter: "Ringing is caused by reflections due to impedance mismatches along the signal path. When a fast-rising edge reaches an unterminated end of a trace (or a connector, via, or stub where the impedance changes), part of the energy reflects back toward the source. The reflected wave bounces back and forth, creating the oscillation we see as ringing. The fix is impedance matching -- either a series termination resistor at the source (value equals the trace impedance minus the driver's output impedance) or a parallel termination resistor at the load (value equals the trace impedance). For most MCU-to-peripheral point-to-point connections, a 22-33 Ohm series resistor at the source is the simplest and most power-efficient approach."

Q2: "When does signal integrity become a concern for embedded firmware?"

Model Answer Starter: "Signal integrity matters when the trace length becomes a significant fraction of the signal's rise time, not the clock frequency. The rule of thumb is: if the one-way trace propagation delay exceeds about one-sixth of the rise time, reflections can corrupt the signal. In practice, this means SI is rarely an issue for I2C or low-speed SPI, but it becomes critical for high-speed SPI above about 25 MHz, SDRAM interfaces, USB, and Ethernet. As a firmware engineer, I need to be aware of this so I request appropriate clock rates in my driver configuration and flag any unexpectedly long traces during layout review."

Q3: "Explain the difference between conducted and radiated emissions."

Model Answer Starter: "Conducted emissions are unwanted electrical noise that leaves the product through its cables -- power cords, signal wires, or communication lines. A common source is switching regulator noise coupling onto the DC power input. Radiated emissions are unwanted RF energy that leaves the product through the air. Common sources include clock harmonics radiating from long traces or cables, unshielded connectors, or gaps in the ground plane. Both are regulated -- FCC Part 15 and CISPR 32 set limits. In practice, radiated emissions are harder to fix because they often involve common-mode currents on cables that act as antennas."

Q4: "Why is a ground plane important, and what happens if a signal trace crosses a split in the ground plane?"

Model Answer Starter: "A ground plane provides a low-inductance return path for signal currents directly beneath the signal trace, minimizing the current loop area. Small loop area means less magnetic flux coupling -- both less radiated emission and less susceptibility to external noise. When a signal trace crosses a split in the ground plane, the return current cannot flow directly beneath the trace and must detour around the gap, dramatically increasing the loop area. This creates a large antenna loop that both radiates and picks up interference. Even a narrow gap can cause an EMC test failure. This is one of the most common PCB layout mistakes."

Q5: "What is common-mode noise and why is it harder to deal with than differential-mode noise?"

Model Answer Starter: "Differential-mode noise flows in opposite directions on the signal and return conductors -- it is the 'normal' signal path. Common-mode noise flows in the same direction on both conductors simultaneously, returning through parasitic paths like stray capacitance or the chassis. It is harder to deal with because standard LC filters do not attenuate it -- a common-mode choke is needed, which presents high impedance to common-mode signals while passing differential signals. Common-mode noise is the dominant cause of radiated emissions because it effectively turns cables into antennas."

Trap Alerts

• Don't say "signal integrity only matters at GHz frequencies" -- a 10 MHz signal with a 2 ns rise time has frequency content in the hundreds of MHz
• Don't forget that rise time, not clock frequency, determines the highest frequency content and therefore whether SI matters for a given trace length
• Don't ignore cables and connectors when discussing EMC -- they are almost always the dominant radiation path, not the PCB traces themselves

Follow-up Questions

• "How would you determine whether a 15 cm SPI trace at 20 MHz needs termination?"
• "What firmware-level changes can you make to reduce radiated emissions without changing the hardware?"
• "How does differential signaling improve noise immunity, and which embedded interfaces use it?"

Practice

Real-World Tie-In

SDRAM bring-up on a custom board: A firmware engineer enabling an external DDR2 memory on a new SoC board found that memtest passed at 200 MHz clock but failed intermittently at 333 MHz. An eye diagram measurement showed the data eye was nearly closed at 333 MHz due to ringing and ISI (inter-symbol interference). The issue was traced to data traces that were not length-matched -- the longest trace was 12 mm longer than the shortest, introducing 72 ps of skew (at about 6 ps/mm). After the EE corrected the length matching and added source-series termination resistors, the eye opened up and memtest passed at full speed. The firmware engineer's role was identifying the failure pattern (speed-dependent, data-pattern-sensitive) that pointed to a SI problem rather than a firmware bug.

Industrial sensor with EMC failures: A 24 V industrial temperature controller failed conducted emissions testing because switching noise from the internal buck converter was coupling back onto the 24 V input cable. The firmware engineer contributed to the fix by adjusting the buck converter's switching frequency (via a register setting) from 500 kHz to 2.1 MHz, moving the fundamental and harmonics out of the critical measurement band. Combined with an input LC filter added by the EE, the product passed on retest. This illustrates how firmware-configurable parameters (switching frequency, clock spread spectrum, slew rate control) directly affect EMC compliance.