What are the different ADC conversion modes, and when do you use each?
Single conversion mode: The ADC performs one conversion on one channel, then stops and waits. Software must explicitly trigger each new conversion. This is the simplest mode and is appropriate for infrequent, on-demand measurements — reading a battery voltage once per second, checking a potentiometer position when a button is pressed, or performing a one-time calibration measurement. The advantage is simplicity and zero background resource usage; the ADC is idle between triggers.
Continuous conversion mode: After completing one conversion, the ADC immediately starts the next, running back-to-back as fast as the ADC clock allows. The data register is continuously updated with the latest result. This mode is best for monitoring a single channel at maximum speed, and is almost always paired with DMA (because the CPU cannot reliably poll fast enough to catch every result without overrun). Continuous mode is the workhorse for real-time signal processing — audio sampling, vibration analysis, or current sensing in motor control.
Scan mode: The ADC sequentially converts a configured list of channels (the scan sequence or regular group). After completing all channels in the sequence, it either stops (single scan) or restarts (continuous scan). This is the standard mode for multi-sensor systems: read temperature on channel 3, current on channel 5, and voltage on channel 8 in a fixed sequence. Combined with DMA, the results land in an array where adc_buf[0] is always temperature, adc_buf[1] is always current, and adc_buf[2] is always voltage — clean and deterministic.
Discontinuous mode: Converts a configurable subset of the scan sequence per trigger — for example, 3 channels per trigger out of a 9-channel sequence, requiring 3 triggers to complete one full scan. This is a niche mode used when you need precise, trigger-synchronized timing for each sub-group but have more channels than can be converted within the available trigger window. It is most common in interleaved ADC motor control schemes where different phase currents must be sampled at specific PWM timing points.
Source: ADC Q&A
